GCC Code Coverage Report


Directory: brotensor/
Coverage: low: ≥ 0% medium: ≥ 75.0% high: ≥ 90.0%
Coverage Exec / Excl / Total
Lines: 16.7% 27 / 0 / 162
Functions: 20.0% 1 / 0 / 5
Branches: 6.9% 14 / 0 / 202

src/ops/fused.cpp
Line Branch Exec Source
1 #include "brotensor/ops/fused.h"
2 #include "brotensor/ops.h"
3 #include "brotensor/tensor.h"
4
5 #ifdef BROTENSOR_HAS_CUDA
6 #include "../cuda/cuda_jit.h"
7 #endif
8 #include "../cpu/cpu_jit.h"
9
10 #include <stdexcept>
11 #include <utility>
12
13 namespace brotensor {
14
15 ✗ void fused_residual_rmsnorm(Tensor& h, const Tensor& proj, const Tensor& gamma,
16 float eps, Tensor& out) {
17 ✗ if (h.device != proj.device || h.device != gamma.device) {
18 ✗ throw std::runtime_error("fused_residual_rmsnorm: device mismatch between operands");
19 }
20 ✗ if (h.size() != proj.size()) {
21 ✗ throw std::runtime_error("fused_residual_rmsnorm: h and proj size mismatch");
22 }
23 ✗ int D = gamma.size();
24 ✗ if (D <= 0 || (h.size() % D != 0)) {
25 ✗ throw std::runtime_error("fused_residual_rmsnorm: invalid hidden dimension");
26 }
27 ✗ int B = h.size() / D;
28
29 ✗ if (out.rows != h.rows || out.cols != h.cols ||
30 ✗ out.dtype != h.dtype || out.device != h.device) {
31 ✗ if (out.device != h.device) {
32 ✗ out = Tensor::empty_on(h.device, h.rows, h.cols, h.dtype);
33 ✗ } else {
34 ✗ out.resize(h.rows, h.cols, h.dtype);
35 }
36 ✗ }
37
38 #ifdef BROTENSOR_HAS_CUDA
39 if (h.device.type == DeviceType::CUDA &&
40 h.dtype == Dtype::FP32 && proj.dtype == Dtype::FP32 && gamma.dtype == Dtype::FP32 &&
41 detail::cuda::jit::is_cuda_jit_available()) {
42 detail::cuda::jit::launch_fused_residual_rmsnorm_ptx(
43 static_cast<float*>(h.data),
44 static_cast<const float*>(proj.data),
45 static_cast<const float*>(gamma.data),
46 static_cast<float*>(out.data),
47 B, D, eps, nullptr
48 );
49 return;
50 }
51 #endif
52
53 ✗ if (h.device.type == DeviceType::CPU &&
54 ✗ h.dtype == Dtype::FP32 && proj.dtype == Dtype::FP32 && gamma.dtype == Dtype::FP32 &&
55 ✗ detail::cpu::jit::is_jit_available()) {
56 ✗ detail::cpu::jit::fused_residual_rmsnorm(
57 ✗ static_cast<float*>(h.data),
58 ✗ static_cast<const float*>(proj.data),
59 ✗ static_cast<const float*>(gamma.data),
60 ✗ eps,
61 ✗ static_cast<float*>(out.data),
62 ✗ B, D
63 );
64 ✗ return;
65 }
66
67 ✗ add_inplace(h, proj);
68 ✗ rms_norm_forward(h, gamma, eps, out);
69 ✗ }
70
71 4 void fused_residual_layernorm(Tensor& x, const Tensor& res, const Tensor& gamma,
72 const Tensor& beta, float eps, Tensor& out) {
73
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4 if (x.device != res.device || x.device != gamma.device || x.device != beta.device) {
74 ✗ throw std::runtime_error("fused_residual_layernorm: device mismatch between operands");
75 }
76
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4 if (x.size() != res.size()) {
77 ✗ throw std::runtime_error("fused_residual_layernorm: x and res size mismatch");
78 }
79 4 int D = gamma.size();
80
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4 if (D <= 0 || beta.size() != D || (x.size() % D != 0)) {
81 ✗ throw std::runtime_error("fused_residual_layernorm: invalid hidden dimension");
82 }
83 4 int B = x.size() / D;
84
85
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4 if (out.rows != x.rows || out.cols != x.cols ||
86 ✗ out.dtype != x.dtype || out.device != x.device) {
87
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4 if (out.device != x.device) {
88 2 out = Tensor::empty_on(x.device, x.rows, x.cols, x.dtype);
89 2 } else {
90 2 out.resize(x.rows, x.cols, x.dtype);
91 }
92 4 }
93
94 #ifdef BROTENSOR_HAS_CUDA
95 if (x.device.type == DeviceType::CUDA &&
96 x.dtype == Dtype::FP32 && res.dtype == Dtype::FP32 && gamma.dtype == Dtype::FP32 && beta.dtype == Dtype::FP32 &&
97 detail::cuda::jit::is_cuda_jit_available()) {
98 detail::cuda::jit::launch_fused_residual_layernorm_ptx(
99 static_cast<float*>(x.data),
100 static_cast<const float*>(res.data),
101 static_cast<const float*>(gamma.data),
102 static_cast<const float*>(beta.data),
103 static_cast<float*>(out.data),
104 B, D, eps, nullptr
105 );
106 return;
107 }
108 #endif
109
110
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6 if (x.device.type == DeviceType::CPU &&
111
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2 x.dtype == Dtype::FP32 && res.dtype == Dtype::FP32 && gamma.dtype == Dtype::FP32 && beta.dtype == Dtype::FP32 &&
112
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2 detail::cpu::jit::is_jit_available() && D >= 8) {
113 2 detail::cpu::jit::fused_residual_layernorm(
114 2 static_cast<float*>(x.data),
115 2 static_cast<const float*>(res.data),
116 2 static_cast<const float*>(gamma.data),
117 2 static_cast<const float*>(beta.data),
118 2 eps,
119 2 static_cast<float*>(out.data),
120 2 B, D
121 );
122 2 return;
123 }
124
125 2 add_inplace(x, res);
126 2 layernorm_forward_inference_batched(x, gamma, beta, out, eps);
127 4 }
128
129 ✗ void fused_layernorm_modulate(const Tensor& x, const Tensor& gamma, const Tensor& beta,
130 const Tensor& scale, const Tensor& shift, float eps,
131 Tensor& out) {
132 ✗ if (x.device != gamma.device || x.device != beta.device ||
133 ✗ x.device != scale.device || x.device != shift.device) {
134 ✗ throw std::runtime_error("fused_layernorm_modulate: device mismatch between operands");
135 }
136 ✗ int D = gamma.size();
137 ✗ if (D <= 0 || beta.size() != D || scale.size() != D || shift.size() != D ||
138 ✗ (x.size() % D != 0)) {
139 ✗ throw std::runtime_error("fused_layernorm_modulate: dimension mismatch");
140 }
141 ✗ int R = x.size() / D;
142
143 ✗ if (out.rows != x.rows || out.cols != x.cols ||
144 ✗ out.dtype != x.dtype || out.device != x.device) {
145 ✗ if (out.device != x.device) {
146 ✗ out = Tensor::empty_on(x.device, x.rows, x.cols, x.dtype);
147 ✗ } else {
148 ✗ out.resize(x.rows, x.cols, x.dtype);
149 }
150 ✗ }
151
152 #ifdef BROTENSOR_HAS_CUDA
153 if (x.device.type == DeviceType::CUDA &&
154 x.dtype == Dtype::FP32 && gamma.dtype == Dtype::FP32 && beta.dtype == Dtype::FP32 &&
155 scale.dtype == Dtype::FP32 && shift.dtype == Dtype::FP32 &&
156 detail::cuda::jit::is_cuda_jit_available()) {
157 detail::cuda::jit::launch_fused_layernorm_modulate_ptx(
158 static_cast<const float*>(x.data),
159 static_cast<const float*>(gamma.data),
160 static_cast<const float*>(beta.data),
161 static_cast<const float*>(scale.data),
162 static_cast<const float*>(shift.data),
163 static_cast<float*>(out.data),
164 R, D, eps, nullptr
165 );
166 return;
167 }
168 #endif
169
170 ✗ if (x.device.type == DeviceType::CPU &&
171 ✗ x.dtype == Dtype::FP32 && gamma.dtype == Dtype::FP32 && beta.dtype == Dtype::FP32 &&
172 ✗ scale.dtype == Dtype::FP32 && shift.dtype == Dtype::FP32 &&
173 ✗ detail::cpu::jit::is_jit_available()) {
174 ✗ detail::cpu::jit::fused_layernorm_modulate(
175 ✗ static_cast<const float*>(x.data),
176 ✗ static_cast<const float*>(gamma.data),
177 ✗ static_cast<const float*>(beta.data),
178 ✗ static_cast<const float*>(scale.data),
179 ✗ static_cast<const float*>(shift.data),
180 ✗ eps,
181 ✗ static_cast<float*>(out.data),
182 ✗ R, D
183 );
184 ✗ return;
185 }
186
187 ✗ Tensor temp = Tensor::empty_on(x.device, x.rows, x.cols, x.dtype);
188 ✗ if (x.dtype == Dtype::FP16) {
189 ✗ layernorm_forward_inference_batched_fp16(x, gamma, beta, temp, eps);
190 ✗ } else {
191 ✗ layernorm_forward_inference_batched(x, gamma, beta, temp, eps);
192 }
193 ✗ modulate(temp, scale, shift, out);
194 ✗ }
195
196 ✗ void fused_gemv_swiglu(const Tensor& x, const Tensor& w_gate, const Tensor& w_up,
197 Tensor& out) {
198 ✗ if (x.device != w_gate.device || x.device != w_up.device) {
199 ✗ throw std::runtime_error("fused_gemv_swiglu: device mismatch between operands");
200 }
201 ✗ int N = w_gate.rows;
202 ✗ int K = w_gate.cols;
203 ✗ if (w_up.rows != N || w_up.cols != K || x.size() != K) {
204 ✗ throw std::runtime_error("fused_gemv_swiglu: dimension mismatch");
205 }
206 ✗ int out_r = (x.rows == 1) ? 1 : N;
207 ✗ int out_c = (x.rows == 1) ? N : 1;
208 ✗ if (out.rows != out_r || out.cols != out_c ||
209 ✗ out.dtype != x.dtype || out.device != x.device) {
210 ✗ if (out.device != x.device) {
211 ✗ out = Tensor::empty_on(x.device, out_r, out_c, x.dtype);
212 ✗ } else {
213 ✗ out.resize(out_r, out_c, x.dtype);
214 }
215 ✗ }
216
217 #ifdef BROTENSOR_HAS_CUDA
218 if (x.device.type == DeviceType::CUDA &&
219 x.dtype == Dtype::FP32 && w_gate.dtype == Dtype::FP32 && w_up.dtype == Dtype::FP32 &&
220 detail::cuda::jit::is_cuda_jit_available()) {
221 detail::cuda::jit::launch_fused_gemv_swiglu_ptx(
222 static_cast<const float*>(w_gate.data),
223 static_cast<const float*>(w_up.data),
224 static_cast<const float*>(x.data),
225 static_cast<float*>(out.data),
226 N, K, nullptr
227 );
228 return;
229 }
230 #endif
231
232 // Vulkan, 16-bit, gate and up the two halves of one stacked
233 // [gate; up] weight (the layout a fused gate_up projection is stored in):
234 // that is exactly linear_forward_batched_ex's SwiGLU epilogue, whose GEMV
235 // kernel does both dot products and the gate in one pass.
236 ✗ const bool sixteen = x.dtype == Dtype::FP16 || x.dtype == Dtype::BF16;
237 ✗ if (x.device.type == DeviceType::VULKAN && sixteen &&
238 ✗ w_gate.dtype == x.dtype && w_up.dtype == x.dtype &&
239 ✗ static_cast<const char*>(w_up.data) ==
240 ✗ static_cast<const char*>(w_gate.data) +
241 ✗ static_cast<size_t>(N) * K * dtype_size_bytes(x.dtype)) {
242 ✗ Tensor w_stacked = Tensor::view(x.device, w_gate.data, 2 * N, K, x.dtype);
243 ✗ Tensor x_row = Tensor::view(x.device, x.data, 1, K, x.dtype);
244 ✗ Tensor y_row = Tensor::view(out.device, out.data, 1, N, out.dtype);
245 ✗ linear_forward_batched_ex(w_stacked, nullptr, x_row, /*act=*/0, kLinearEpiSwiglu,
246 nullptr, y_row);
247 return;
248 ✗ }
249
250 ✗ Tensor zero = Tensor::zeros_on(x.device, N, 1, x.dtype);
251 ✗ Tensor up = Tensor::empty_on(x.device, (x.rows == 1 ? 1 : N), (x.rows == 1 ? N : 1), x.dtype);
252 ✗ Tensor x_row = (x.rows == 1) ? x : Tensor::view(x.device, x.data, 1, K, x.dtype);
253 ✗ linear_forward_batched(w_gate, zero, x_row, out);
254 ✗ silu_forward(out, out);
255 ✗ linear_forward_batched(w_up, zero, x_row, up);
256 ✗ mul_inplace(out, up);
257 ✗ out.rows = out_r;
258 ✗ out.cols = out_c;
259 ✗ }
260
261 ✗ void fused_gemv_residual(const Tensor& x, const Tensor& w_down, const Tensor& res,
262 Tensor& out) {
263 ✗ if (x.device != w_down.device || x.device != res.device) {
264 ✗ throw std::runtime_error("fused_gemv_residual: device mismatch between operands");
265 }
266 ✗ int N = w_down.rows;
267 ✗ int K = w_down.cols;
268 ✗ if (x.size() != K || res.size() != N) {
269 ✗ throw std::runtime_error("fused_gemv_residual: dimension mismatch");
270 }
271 ✗ if (out.rows != res.rows || out.cols != res.cols ||
272 ✗ out.dtype != res.dtype || out.device != res.device) {
273 ✗ if (out.device != res.device) {
274 ✗ out = Tensor::empty_on(res.device, res.rows, res.cols, res.dtype);
275 ✗ } else {
276 ✗ out.resize(res.rows, res.cols, res.dtype);
277 }
278 ✗ }
279
280 #ifdef BROTENSOR_HAS_CUDA
281 if (x.device.type == DeviceType::CUDA &&
282 x.dtype == Dtype::FP32 && w_down.dtype == Dtype::FP32 && res.dtype == Dtype::FP32 &&
283 detail::cuda::jit::is_cuda_jit_available()) {
284 detail::cuda::jit::launch_fused_gemv_residual_ptx(
285 static_cast<const float*>(w_down.data),
286 static_cast<const float*>(x.data),
287 static_cast<const float*>(res.data),
288 static_cast<float*>(out.data),
289 N, K, nullptr
290 );
291 return;
292 }
293 #endif
294
295 ✗ Tensor x_row = (x.rows == 1) ? x : Tensor::view(x.device, x.data, 1, K, x.dtype);
296 ✗ Tensor bias_col = (res.cols == 1) ? res : Tensor::view(res.device, res.data, N, 1, res.dtype);
297 ✗ if (out.data == res.data) {
298 ✗ Tensor tmp = Tensor::empty_on(x.device, res.rows, res.cols, x.dtype);
299 ✗ linear_forward_batched(w_down, bias_col, x_row, tmp);
300 ✗ tmp.rows = res.rows;
301 ✗ tmp.cols = res.cols;
302 ✗ out = std::move(tmp);
303 ✗ } else {
304 ✗ linear_forward_batched(w_down, bias_col, x_row, out);
305 ✗ out.rows = res.rows;
306 ✗ out.cols = res.cols;
307 }
308 ✗ }
309
310 } // namespace brotensor
311